Overview

The DVB-S2 (Digital Video Broadcasting - Satellite - Second Generation) IP Core offers a high-performance, fully compliant, and cost-efficient solution for satellite-based communication systems. Designed to implement the ETSI EN 302 307 standard, our DVB-S2 IP Core supports all key features of the specification, including powerful LDPC/BCH Forward Error Correction, adaptive coding and modulation (ACM), and multi-stream transmission—enabling robust and bandwidth-efficient data transmission over satellite links.

  • Full DVB-S2 Compliance: Implements ETSI EN 302 307 standard supporting QPSK, 8PSK, 16APSK, and 32APSK modulation schemes.
  • LDPC and BCH FEC Encoder/Decoder: Highly optimized Forward Error Correction with concatenated LDPC and BCH coding for excellent noise resilience and performance near Shannon limit.
  • ACM/VCM Support: Supports Adaptive Coding and Modulation (ACM) and Variable Coding and Modulation (VCM) for dynamic bandwidth adaptation based on channel conditions.
  • Multi-Stream Transmission: Enables efficient bandwidth use by multiplexing multiple transport streams over a single carrier using ISI (Input Stream Identifier).
  • High Throughput: Designed for high data rate transmission up to several hundred Mbps, depending on configuration and platform.
  • Configurable Code Rates: Supports multiple code rates (1/4 to 9/10), customizable according to link requirements.
  • Standardized Interfaces: AXI4-Stream, Avalon-ST, or custom interface options available for integration with host processing systems or transport stream engines.
  • Optional AES Encryption Module: Integrate stream ciphering for secure satellite communications (available as an add-on).
  • Exceptional Spectral Efficiency: Leverages higher-order modulation and advanced FEC to maximize bandwidth utilization.
  • Reliable in Noisy Environments: With LDPC + BCH coding, the IP core ensures highly reliable communication even in low SNR conditions or rain-fade-prone environments.
  • Highly Modular Design: Easily integrates with other IP blocks such as MPEG-TS processors, modulators/demodulators, and network controllers.
  • Customizable and Portable: Supplied as fully synthesizable RTL (Verilog/VHDL) for easy adaptation across FPGA and ASIC platforms.
  • Low Latency, High Throughput: Optimized for real-time applications requiring efficient satellite uplinks and downlinks with minimal delays.
  • Cost-Effective Deployment: Reduces development time and cost by providing a production-proven and verification-ready IP block.
  • Direct-to-Home (DTH) Satellite Broadcasting
  • Satellite Internet Access
  • Government & Defense Communications
  • Disaster Recovery Networks
  • Remote Sensing and IoT Connectivity
  • Enterprise VSAT Networks
  • FPGAs:
    • Xilinx: Zynq Ultrascale+, Kintex-7, Artix-7
    • Intel: Arria 10, Cyclone V, Stratix V
    • Microsemi, Lattice (case-dependent)
  • ASICs: Technology nodes from 65nm down to 7nm, supported with full synthesis and place & route guidance.
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